tq c9305 0 .7 - 3.6 ghz digital variable gain amplifier datasheet: rev f 0 4 - 10 - 14 - 1 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com applications ? wireless infrastructure ? lte / wcdma / cdma / gsm ? tdd or fdd systems ? general purpose wireless 32- pin 5x5mm leadl ess smt package product features ? integrates dsa + amp functionality ? 0.7 C 3.6 ghz broadband performance ? 5 - bit control, 31 db range ? 1 3 db gain at 1.9 ghz ? 3. 1 db noise figure at max gain setting ? +2 3 dbm p1db ? + 2 7 dbm i ip3 , +40 dbm oip3 ? integrated on - chi p matching, 50 ohm in/out ? integrated shutdown control for tdd compatibility ? +5v supply voltage , 3.3v ttl logic compatible functional block diagram pin 1 marking package topside n/c gnd rf out/v amp gnd n/c n/c gnd v pd amp tqc9305 32 spi dsa 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 8 7 6 5 4 3 2 1 n/c gnd rf in gnd n/c n/c n/c sid n/c n/c n/c n/c n/c n/c n/c n/c clk le gnd v dd v dd gnd n/c gnd exposed backside pad rf/dc gnd pin configuration pin no. label 1, 5, 6, 7, 15, 19, 20, 24 - 32 n/c 2, 4, 11, 14, 16, 18, 21, 23 gnd 3 rf in 8 sid 9 clk 10 le 12, 13 v dd 17 v pd 22 rf out / v amp backside paddle rf/dc ground general description the tqc9305 is a digitally controlled variable gain amplifier (dvga) with a broadband frequency range of 700 to 36 00 mhz. the d vga features high linearity and low noise while providing digital variable gain with a 31 db of range in 1 db steps through a serial mode control interface. at 1.9 ghz, the dvga typically provides 13 db gain, +40 dbm oip3, +23 dbm p1db and 3.1 db noise fi gure. this combination of performance parameters makes the dvga ideal for receiver applications requiring gain con trol with high iip3 and low noise figure. in addition, the dvga integrates a shut - down biasing capability to allow for easy operation for tdd applications. the tqc9305 integrates a high performance digital step attenuator followed by a high linearity, broadband gain block. both stages are internally matched to 50 ohms and do not require any external matching components. the tqc9305 is package d in a rohs - compliant, compact 5x5 mm surface - mount leadless package. ordering information part no. description tqc9305 0.7 - 3.6 ghz dvga tqc9305 - pcb evaluation board standard t/r size = 2500 pcs on a 13 reel.
tq c9305 0 .7 - 3.6 ghz digital variable gain amplifier datasheet: rev f 0 4 - 10 - 14 - 2 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com recommended operating conditions parameter min typ max units v amp +4.75 +5 +5.25 v v dd +3 +5 v t ch (for >10 6 hours mttf) + 190 c case temperature - 40 + 105 c electrical specifications are measured at specified test conditions. specifications are not guaranteed over all recom mended operating conditions. absolute maximum ratings parameter rating storage temperature - 65 to 150 c rf input power , cw, 50, 24 hr, 25c +22 dbm v dd , power supply voltage - 0.3 to +5.5 v digital input voltage - 0.3 to v dd +0.5 v operation of this devi ce outside the parameter ranges given above may cause permanent damage. electrical specifications test conditions : t lead =+25c, v amp = v dd = +5 v parameter conditions min typ max units operational frequency range 700 3600 mhz test frequency 1950 mhz gain max gain setting 11.5 1 3 14.5 db gain control range 31 db gain control step size 1 db gain accu racy 700 C 2700 mhz (major state s ) (0.3 + 4% of atten. setting) db input return loss 1 9 db output return loss 1 6 .5 db output p1db +23 dbm output ip3 pout/tone = 0 dbm, f = 1 mhz + 39 .7 dbm input ip3 pin/tone = - 13 dbm, f = 1 mhz +23 .5 +2 6 .7 dbm noise figure max gain setting 3. 1 db switching speed off to on state (50% v pd to 90% rfout) 0.8 5 s on to off state (50% v pd to 1 0% rfout ) 2. 0 s amplifier s hutdown control , v pd on state 0 0. 4 v off state (power down) 1.5 v dd v shutdown pin current, i pd off state 140 a amplifier current , i amp (pin 22) on state 100 130 160 ma off state (power down) 3 ma dsa current, i dd (pins 12, 13) 1.4 ma t hermal resistance (r th ) channel to case 48 .3 c /w
tq c9305 0 .7 - 3.6 ghz digital variable gain amplifier datasheet: rev f 0 4 - 10 - 14 - 3 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com serin clk le parallel data valid t sdsup t sdhld t lesup t lepw d7 d6 d5 d4 d3 d2 d1 d0 serial control interface the tqc9305 has a cmos spi tm input compatible serial interface. this serial control interface converts the serial data input stream to parallel output word. the input i s 3 - wire (clk, le and sid) spi tm input compatible. at power up, the serial control interface resets the dvga to the minimum gain state ( maximum attenuation setting) . the 8 - bit serial input data (sid) word is loaded into the register on rising edge of th e clk, lsb first. when le is high, clk is internally disabled in the dvga. serial control timing characteristics (test conditions: v dd = +5 v, temp.=25c) parameter condition min max units clock frequency 50% duty cycle 20 mhz le setup time, t lesup after last clk rising edge 10 ns le pulse width, t lepw 16 n s sid set - up time, t sdsup before clk rising edge 8 n s sid hold - time, t sdhld after clk rising edge 8 n s propagation delay, t plo le to parallel output valid 10 ns le pulse spacing, t le le to le pulse spacing 630 ns serial control dc logic characteristics (test conditions: v dd = +5 v, temp.=25c) parameter condition min max units low state input voltage, v il 0 0. 8 v high state input voltage, v ih 2. 1 v dd v input current, i ih / i il o n sid, le and clk - 10 +10 a
tq c9305 0 .7 - 3.6 ghz digital variable gain amplifier datasheet: rev f 0 4 - 10 - 14 - 4 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com serial control interface serial in control logic truth table, l sb in first 8 - bit control word attenuation d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 0 0 0 0 0 insertion loss 0 0 0 0 0 1 0 0 1 db 0 0 0 0 1 0 0 0 2 db 0 0 0 1 0 0 0 0 4 db 0 0 1 0 0 0 0 0 8 db 0 1 0 0 0 0 0 0 16 db 0 1 1 1 1 1 0 0 31 db 0 1 0 1 1 0 0 0 22 db (example) note: 1) bit d1 needs to be kept logic 0 to maintain the 1db step for the dsa control. 2) optionally, the dvga can be used with a 0.5db step a ttenuation by activating bit d1 and hence using 6 - bits (d1 - d6). 3) bits d0 and d7 are dont care.
tq c9305 0 .7 - 3.6 ghz digital variable gain amplifier datasheet: rev f 0 4 - 10 - 14 - 5 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com performance summary test conditions : t lead =+25c, v amp = v dd =+5v , i amp = 130 ma frequency 9 00 1700 1950 2140 2600 mhz gain 1 5 13. 4 12. 9 12. 7 12 db input return loss 1 8 1 8 1 9 20 18 db output return loss 20 1 7 1 7 1 7 1 7 db output p1db +2 3 +2 3 +2 3 +2 3 +22. 1 db m output ip3 (pout/tone= 0 dbm, f=1mhz) +41 . 2 +40 + 40 +40 +3 8 db m input ip3 (p in /tone= - 13 dbm, f=1mhz) +26. 2 +2 6.5 +2 6 . 7 +2 7 . 5 +2 6 db m noise figure 2.8 3. 0 3. 1 3. 2 3.6 db amplifier current , i amp 130 ma performance plots 6 8 10 12 14 16 0 500 1000 1500 2000 2500 3000 3500 4000 gain (db) frequency (mhz) gain vs. frequency +85 c +25 c ?40 c -25 -20 -15 -10 -5 0 0 500 1000 1500 2000 2500 3000 3500 4000 |s11| (db) frequency (mhz) input return loss vs. frequency +85 c +25 c ?40 c -25 -20 -15 -10 -5 0 0 500 1000 1500 2000 2500 3000 3500 4000 |s22| (db) frequency (mhz) output return loss vs. frequency +85 c +25 c ?40 c 15 20 25 30 35 800 1200 1600 2000 2400 2800 iip3 (dbm) frequency (mhz) iip3 vs. frequency +85 c +25 c ?40 c 20 21 22 23 24 25 800 1200 1600 2000 2400 2800 p1db (dbm) frequency (mhz) p1db vs. frequency +85 c +25 c ?40 c 0 1 2 3 4 5 800 1200 1600 2000 2400 2800 noise figure (db) frequency (mhz) noise figure vs. frequency +85 c +25 c ?40 c -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 attenuation error (db) attenuation states attenuation error vs. attenuation states +85 c +25 c ?40 c frequency = 1950 mhz -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 bit error attenuation state bit error vs. attenuation states +85 c +25 c ?40 c 0 1 2 3 4 5 0 0.5 1 1.5 2 2.5 3 3.5 4 k - factor frequency (ghz) k - factor vs. frequency +85 c +25 c ?40 c
tq c9305 0 .7 - 3.6 ghz digital variable gain amplifier datasheet: rev f 0 4 - 10 - 14 - 6 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com tq c9305 - pcb evaluation board j1 rf input c4 j2 rf output clk le j6 pins 12 13 vdd j6 pin 1 vdd j6 pin 19 l1 0603 c2 c1 7 amp dsa 5 4 3 2 6 1 32 8 9 24 25 15 16 17 spi 13 12 11 10 14 18 20 21 22 23 19 28 29 30 31 27 26 u1 tqc9305 sid j6 pin 11 c3 c5 c6 r1 0 ? r2 dnp vpd j3 r3 0 ? j6 pin 3 gnd j4 note: r1, r2 & r3 need not be populated if the shut - down functionality is not required. pin 17 can be left open or grounded. bill of material: tqc9305 - pcb reference desg. value description manufacturer part number u1 n/a tqc9305 triquint tqc 9305 c1, c2 33 pf cap, chip, 0402, 10%, 50v various c 3 , c 4 100pf cap, chip, 0402, 10%, 50v v arious c 5 , c 6 1.0uf cap, chip, 0603, 10%, 10v various l1 68nh ind, coil, 5%, 0603 coilcraft 0603cs - 68nxjl r1, r3 res, chip, 0603, 5%, 1/16w various
tq c9305 0 .7 - 3.6 ghz digital variable gain amplifier datasheet: rev f 0 4 - 10 - 14 - 7 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com pin configuration and description pin 1 marking package topside n/c gnd rf out/v amp gnd n/c n/c gnd v pd amp tqc9305 32 spi dsa 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 8 7 6 5 4 3 2 1 n/c gnd rf in gnd n/c n/c n/c sid n/c n/c n/c n/c n/c n/c n/c n/c clk le gnd v dd v dd gnd n/c gnd exposed backside pad rf/dc gnd pin no. label description 1, 5, 6, 7, 15, 19, 20, 24 - 32 n/c no internal connection but can be grounded 2, 4, 11, 14, 16, 18, 21, 23 gnd dc/rf ground connection 3 rf in rf input. needs to be capacitively coupled 8 sid serial data input 9 clk clock signal in 10 le latch enable pin 12, 13 v dd dc supply voltage for spi and dsa. pins are internally tied together 17 v pd amplifier power down control pin 22 rf out / v amp rf o utput and dc bias for amplifier . needs to be capacitively coupled backside pad rf/dc ground ground connection for proper thermal dissipation evaluation board material information triquint pcb 1 110304 material and stack - up 50 ohm line dim ensions: width = .0 26 , spacing = .03 2 . 1 oz. cu bottom layer nelco n-4000-13 core nelco n-4000-13 r =3.7 typ. 1 oz. cu top layer 1 oz. cu inner layer 1 oz. cu inner layer 0.014" 0.014" 0.062" 0.006" finished board thickness
tq c9305 0 .7 - 3.6 ghz digital variable gain amplifier datasheet: rev f 0 4 - 10 - 14 - 8 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com package marking and dimensions pcb mounting pattern all dimensions are in millimeters (inches). angles are in degrees. n otes : 1. al l dimensions are in millimeters. angles are in degrees. 2. use 1 oz. copper minimum for top and bottom layer metal. 3. vias are required under the backside paddle of this device for proper rf/dc grounding and thermal dissipation. we recommend a 0.35mm (#80/ .0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25mm (0.10). 4. ensure good package backside paddle solder attach for reliable operation and best electrical performance. component side 3.70 3.70 23x package outline 0.66 0.76 0.38 3 1 32x 0.70 32x 0.31 0.50 pitch 0.15 2x 32x seating plane 5.00.1 5.00.1 1.75 1.75 1.75 1.75 0.820.08 2x 0.25 32x 0.50 pitch c 0.25 5 terminal #1 identifier gnd/thermal pad (1x) shape 0.10 c a b 32x 0.10 .10 c .10 c .10 c .08 c terminal #1 top view side view bottom view 0.225 4 5 a b (32x) 0.35x x 0.250y 0.10 c a b 1.55 package marking: part number C tqc9305 year, week - yyww assembly code - xxxxx triquint tqc9305 yyww cccc aaxxxx notes: 1. all dimensions are in millimeters. angles are in degrees. 2. except where noted, this part outline conforms to jedec standard mo - 270, issue b (variation dae) for extra thin profile, fine pitch, internal stacking module (ism). 3. dimension and tolerance formats conform to asme y14.4m - 1994. 4. the terminal #1 identifier and termi nal numbering conform to jesd 95 - 1 spp - 012. 5. co - planarity applies to the exposed ground/thermal pad as well as the contact pins.
tq c9305 0 .7 - 3.6 ghz digital variable gain amplifier datasheet: rev f 0 4 - 10 - 14 - 9 of 9 - disclaimer: subject to change without notice ? 201 4 triquint www.triquint.com product compliance information esd sensitivity ratings caution! esd - sensitive device esd rating: class 1 a value: passes 25 0v to < 5 00v test: human body model (hbm) standard: jedec standard jesd22 - a114 esd rating: class c3 value: passes 1000 v test: charged device mo del (cdm) standard: jedec standard jesd22 - c101 solderability compatible with both lead - free (260 c max. reflow temp.) and tin/lead (245 c max. reflow temp.) soldering processes. package lead plating: electrolytic plated au over ni. rohs compliance th is part is compliant with eu 2002/95/ec rohs directive (restrictions on the use of certain hazardous substances in electrical and electronic equipment). this product also has the following attributes: ? halogen free (chlorine, bromine) ? antimony free ? tbbp - a (c 15 h 12 br 4 0 2 ) free ? pfos free ? svhc free ? lead free msl rating msl rating: level 3 test: +260 c convection reflow standard: jedec standard ipc/jedec j - std - 020 contact information for the latest specifications, additional product information, worldwi de sales and distribution locations, and information about triquint: web: www.triquint.com tel: +1.503.615.9000 email: info - sales@triquint.com fax: +1.503.615.8 902 for technical questions and application information: email: sjcapplications.engineering@triquint.com important notice the information contained herein is believed to be reliab le. triquint makes no warranties regarding the information contained herein. triquint assumes no responsibility or liability whatsoever for any of the information contained herein. triquint assumes no responsibility or liability whatsoever for the use o f the information contained herein. the information contained herein is provided "as is, where is" and with all faults, and the entire risk associated with such information is entirely with the user. all information contained herein is subject to change without notice. customers should obtain and verify the latest relevant information before placing orders for triquint products. the information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any pat ent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. triquint products are not warranted or authorized for use as critical components in medical, life - s aving, or life - sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death.
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